********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
********************************
*May 19, 2014
*ECN S14-1069, Rev. B
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT Si8487DB D G S 
M1 3 GX S S PMOS W= 3210000u L= 0.25u 
M2 S GX S D NMOS W= 3210000u L= 2.708e-07 
R1 D 3 1.908e-02 3.954e-03 -1.553e-07 
CGS GX S 1.222e-09 
CGD GX D 5.274e-11 
RG G GY 15
RTCV 100 S 1e6 1.053e-04 2.940e-06 
ETCV GY GX 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD D S DBD 
**************************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 3e-8 
+ RS = 1.979e-03 KP = 4.465e-06 NSUB = 6.342e+15 
+ KAPPA = 2.173e-03 ETA = 4.883e-05 NFS = 1.369e+12 
+ LD = 0 IS = 0 TPG = -1) 
*************************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 3e-8 
+NSUB = 2.828e+16 IS = 0 TPG = -1 ) 
**************************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 2.000e-08 TREF = 25 BV = 31 
+RS = 2.014e-02 N = 1.566e+00 IS = 9.903e-08 
+EG = 9.769e-01 XTI = 9.880e-01 TRS = 6.768e-04 
+CJO = 1.751e-10 VJ = 3.000e-01 M = 1.731e-01 ) 
.ENDS 
